These chips have not been authoritatively reported at time of composing, so treat the taking after as spills / bits of gossip or maybe than affirmed specs.
Ryzen 9 9950X3D2
It is detailed to be a 16-core / 32-thread portion (2 CCDs each with 8 centers).
Notebook check
+6
Wccftech
+6
Notebook check
+6
What sets it separated in the bits of gossip: each CCD is said to have its possess 3D V-Cache chaplet (i.e., double 3D V-Cache). That implies a implied 192 MB of L3 cache add up to (vs 128 MB on the single-tile X3D variation).
DLCompare.com
+3
Notebook check
+3
Wccftech
+3
Base clock (charged): ~4.3 GHz. Boost clock up to ~5.6 GHz.
Notebook check
+2
Wccftech
+2
TDP is reputed up to ~200 W (compared to ~170 W on the existing X3D tall conclusion).
Notebook check
+1
The title “9950X3D2” clues that this is a revive or advancement of the “X3D” line, or maybe than an totally unused era.
OC3D
+1
Ryzen 7 9850X3D
An 8-core / 16-thread chip, basically a successor to the existing high-end 8-core X3D portion (e.g., 9800X3D).
Notebook check
Retains the same 96 MB L3 cache (through 3D V-Cache) in gossipy tidbits, but with higher boost clock — up to 5.6 GHz (vs ~5.2 GHz on its forerunner).
DLCompare.com
+1
TDP clearly around 120 W in the spills.
Notebook check
+1
Kind of situated as a “gaming-focused” revive: higher clocks, same center tally & cache estimate, pointed at making strides single-thread / gaming execution.
OC3D
+1
What these enhancements might mean
Here’s what these changes may bring in viable terms — once more accepting the gossipy tidbits hold true.
For Ryzen 9 9950X3D2:
The move to double X3D chaplets (i.e., two V-Cache stacks) implies the add up to L3 cache is bumped altogether (192 MB vs 128 MB) in spills. That might offer assistance in workloads that advantage from exceptionally expansive caches: e.g., a few content-creation, reenactment, database, or caching-heavy errands. (Concurring to the leakiest.)
Notebook check
+2
Wccftech
+2
Because the boost clock is somewhat lower (5.6 GHz vs 5.7 GHz in prior lead) but the cache is greater, the trade-off recommends AMD may be optimizing for workloads where cache things more than crude crest clocks.
For gaming, the advantage of additional cache over a certain point gets to be decreasing (a few earlier commentary contends the incremental gaming pick up from exceptionally huge cache is little). But for “creator” / multi-threaded furthermore cache-sensitive workloads, this may matter more. The higher TDP (200 W) demonstrates this is not a normal “mainstream” chip but an enthusiast/workstation class.
If the chip remains AM5 consistent and employments the existing Zen 5 (“Granite Ridge”) engineering, it may be a drop-in overhaul for numerous clients with AM5 sheets (with BIOS upgrade) — accepting the motherboard VRMs and cooling can handle the 200W TDP. (Spilled sources recommend so.)
Notebook check
+1
For Ryzen 7 9850X3D:
By boosting the clock speed up to ~5.6 GHz whereas keeping the same 96 MB cache, AMD may be tending to one of the normal reactions of X3D parts: that their clocks tend to be to some degree lower due to the thermal/stacking imperatives of V-Cache. Raising the clock makes a difference single-thread/gaming performance.
For gamers (who ordinarily care more approximately boost clock & inactivity than mega-cache), this chip seem be an alluring alternative: “good sum of cache + tall clocks + 8 cores” might hit a sweet spot in the gaming-centric desktop market.
The 120 W TDP proposes it remains in a more sensible power/thermal envelope compared to the 200W beast over, making it more doable for numerous desktop builds.
Because the spec changes are incremental (same center tally, same cache estimate, same stage), this may be a moderately “safe” revive — less almost design and more almost binning + optimization.
Key Caveats & Things to Watch
While the gossipy tidbits are curiously, a few critical caution-points apply:
None of this is formally affirmed by AMD however. These are spills from sources such as “chi11eddog” on X (once Twitter). For occasion, in one article: “The most recent spill comes from chi11eddog …”
Wccftech
+1
Because the dual-3D-V-Cache plan (i.e., two chaplets each with V-Cache) has been already ruled out by AMD (for fetched / advantage reasons) agreeing to a few commentary, there is a plausibility this may not be mass discharged or may as it were serve specialty sections. For illustration, Wikipedia’s Ryzen page notices: “internal testing driven them to conclude that diversions would not advantage sufficient from such setups, making them financially infeasible.”
Wikipedia
+1
Even if specs are precise, real-world execution picks up (particularly in gaming) may be unassuming. More cache isn’t continuously straight execution pick up; extra idleness, die-layout or control limitations may balanced a few advantage. For illustration, one article states: “However, the two partitioned 3D V-Cache chaplets might present undesirable inactivity in gaming scenarios.”
Notebook check
+1
The higher TDP (particularly the 200W figure) implies framework necessities (cooling, control supply, motherboard VRMs) will be more rigid. The esteem suggestion will depend on how much additional execution one gets relative to fetched and power.
Pricing has not been formally declared — spills propose that the lead chip may be altogether more costly (a few hypothesis $799 or higher) which may constrain take-up.
Wccftech
Leaks may alter: clocks, cache sizes, TDPs, or indeed item naming may contrast in last production.
How to decipher for potential buyers / enthusiasts
If you’re somebody considering an update or building a modern framework, how ought to you translate these rum ours?
If you as of now possess a high-end AM5 board (with great VRM & cooling) and you’re running something like a 16-core Zen 5 or comparative, at that point unless you are doing workloads that intensely advantage from enormous cache (e.g., workloads with expansive working sets, recreation, database, overwhelming maker assignments), overhauling fair for “gaming” may allow lessening returns.
If you’re a gamer/designer who cares almost each micro-frame or doing overwhelming substance creation, at that point the “9950X3D2” (in the event that genuine) might be a beneficial target — but you’ll require to budget for the cooling, control draw and likely higher price.
The “9850X3D” sounds like a more adjusted update way: 8 centers + tall clock + 96 MB cache in a more sensible warm envelope. If you’re gaming on an AM5 stage and need a more future-proof chip, this might hit a great sweet-spot.
Waiting might make sense: since these are revives (not brand-new design), you may see way better esteem as more seasoned X3D chips drop in cost when the modern models dispatch. Moreover, last execution audits will tell how much genuine advantage the additional cache & clock bring.
Ensure your motherboard/BIOS will bolster it. Whereas spills say AM5 compatibility will be kept up, higher TDP & control draw cruel that the down to earth prerequisites for great VRM and cooling increase.
What this proposes for AMD’s strategy
From a broader viewpoint, these supposed chips indicate at a few key points for AMD:
AMD shows up to be multiplying down on the “X3D / gaming-/cache-enhanced” specialty. The unique esteem of 3D V-Cache has been solid in gaming, and a dual-tile form proposes AMD needs to keep a tech-lead (or at slightest equality) in that segment.
By expanding clocks + cache, AMD may be endeavoring to neutralize progresses from competitors (e.g., up and coming Intel revives) which are focusing on higher clock speeds or IPC picks up. Spills say this as a likely inspiration.
DLCompare.com
+1
The “refresh” demonstrate (or maybe than a full blown unused engineering) permits AMD to repeat on existing Zen 5 “Granite Ridge” perhaps with refined binning, moved forward yields or superior handle optimizations (e.g., N4 or comparable hub) without major update. This permits speedier time-to-market and less chance. A few articles reference that.
OC3D
By advertising different levels (8C with 3D V-Cache, 16C with double 3D V-Cache), AMD can broaden its offerings: gamers with 8C, creators/enthusiasts with 16C, and still keep up premium estimating for the high-end.
However, the double 3D V-Cache course has cost/power/latency trade-offs. If AMD goes this course, they are verifiably wagering that there is adequate request (and edge) for extraordinary devotee parts.
Summary
The Ryzen 9 9950X3D2 (gossip) is spaced at ~16 cores/32 strings, ~192 MB L3 (double 3D V-Cache), boost ~5.6 GHz, TDP ~200 W.
The Ryzen 7 9850X3D (gossip) is ~8 cores/16 strings, ~96 MB L3, boost ~5.6 GHz, TDP ~120 W.
These will (in case genuine) sit in the AM5 / Zen 5 “granite ridge” environment, likely consistent with existing sheets (with BIOS upgrade) but with higher power/cooling demands.
The benefits are likely most grounded in workloads that can utilize huge cache and tall clocks; gaming picks up may be incremental.
Pricing, accessibility, and last execution stay obscure; as continuously, “leak” = treat with caution.
For buyers: if you esteem top-tier execution and are fine contributing in cooling/board quality, hold up for full subtle elements; if you are more standard, consider whether the incremental advantage legitimizes taken a toll over existing high-end chips.

0 Comments